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The Energy Efficiency of IRAM Architectures., , , , , , , and . ISCA, page 327-337. ACM, (1997)Efficient Field Processing Cores in an Innovative Protocol Processor System-on-Chip., , , , , , , , and . DATE, page 20014-20019. IEEE Computer Society, (2003)Processing and Scheduling Components in an Innovative Network Processor Architecture., , , , , , , and . VLSI Design, page 195-201. IEEE Computer Society, (2003)Intelligent RAM (IRAM): The Industrial Setting, Applications and Architectures., , , , , , , , , and 3 other author(s). ICCD, page 2-7. IEEE Computer Society, (1997)Scalable Processors in the Billion-Transistor Era: IRAM., , , , , , , , , and 3 other author(s). Computer, 30 (9): 75-78 (1997)PRO3: A Hybrid NPU Architecture., , , , , , , , and . IEEE Micro, 24 (5): 20-33 (2004)Verification of a Complex SoC: The PRO3 Case-Study., , , , , , , , and . DATE, page 20224-20231. IEEE Computer Society, (2003)