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Single inductor DC-DC converter with bipolar outputs using charge pump., , , , , , , , , and 2 other author(s). APCCAS, page 460-463. IEEE, (2010)Design methodology for determining the number of stages in a cascaded time amplifier to minimize area consumption., , and . IEICE Electron. Express, 10 (11): 20130289 (2013)Asynchronous capacitive SAR ADC based on Hopfield network., , , , , and . IEICE Electron. Express, 19 (18): 20220276 (2022)Spatial and temporal stability of vision chips including parasitic inductances and capacitances., and . ICASSP, page 1081-1084. IEEE, (1998)Image processing regularization filters on layered architecture., , , and . Neural Networks, 6 (3): 327-350 (1993)CMOS Circuits to Measure Timing Jitter Using a Self-Referenced Clock and a Cascaded Time Difference Amplifier With Duty-Cycle Compensation., , , , and . IEEE J. Solid State Circuits, 47 (11): 2701-2710 (2012)Analysis and Design of Multi-Tone Signal Generation Algorithms for Reducing Crest Factor., , , , , and . ATS, page 1-6. IEEE, (2020)Application of Residue Sampling to RF/AMS Device Testing., , , , , , and . ATS, page 19-24. IEEE, (2021)Study of Rauch Low-Pass Filters using Pascal's Triangle., , and . ICEIC, page 1-4. IEEE, (2021)A high-speed CMOS track/hold circuit., , , , , , , , , and 1 other author(s). ICECS, page 1709-1712. IEEE, (1999)