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MIRA: A Multi-layered On-Chip Interconnect Router Architecture.

D. Park, S. Eachempati, R. Das, A. Mishra, Y. Xie, N. Vijaykrishnan, and C. Das. ISCA, page 251-261. IEEE Computer Society, (2008)

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K Mishra

Asit Datta

Asit Dan

Asit Choudhuri

Dushyant Mishra

Other publications of authors with the same name

An energy-efficient heterogeneous CMP based on hybrid TFET-CMOS cores.V. Saripalli, A. Mishra, S. Datta, and V. Narayanan. DAC, page 729-734. ACM, (2011)OWL: cooperative thread array aware scheduling techniques for improving GPGPU performance.A. Jog, O. Kayiran, N. Nachiappan, A. Mishra, M. Kandemir, O. Mutlu, R. Iyer, and C. Das. ASPLOS, page 395-406. ACM, (2013)Coordinated power management of voltage islands in CMPs.A. Mishra, S. Srikantaiah, M. Kandemir, and C. Das. SIGMETRICS, page 359-360. ACM, (2010)Tangle: Route-oriented dynamic voltage minimization for variation-afflicted, energy-efficient on-chip networks.A. Ansari, A. Mishra, J. Xu, and J. Torrellas. HPCA, page 440-451. IEEE Computer Society, (2014)Apprentice: Using Knowledge Distillation Techniques To Improve Low-Precision Network Accuracy.A. Mishra, and D. Marr. ICLR (Poster), OpenReview.net, (2018)Architecting on-chip interconnects for stacked 3D STT-RAM caches in CMPs.A. Mishra, X. Dong, G. Sun, Y. Xie, N. Vijaykrishnan, and C. Das. ISCA, page 69-80. ACM, (2011)A case for dynamic frequency tuning in on-chip networks.A. Mishra, R. Das, S. Eachempati, R. Iyer, N. Vijaykrishnan, and C. Das. MICRO, page 292-303. ACM, (2009)MIRA: A Multi-layered On-Chip Interconnect Router Architecture.D. Park, S. Eachempati, R. Das, A. Mishra, Y. Xie, N. Vijaykrishnan, and C. Das. ISCA, page 251-261. IEEE Computer Society, (2008)METE: meeting end-to-end QoS in multicores through system-wide resource management.A. Sharifi, S. Srikantaiah, A. Mishra, M. Kandemir, and C. Das. SIGMETRICS, page 13-24. ACM, (2011)Detection of Arcing in Low Voltage Distribution Systems.A. Mishra, A. Routray, and A. Pradhan. ICIIS, page 1-3. IEEE, (2008)

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Disambiguation of "Mishra, Asit K."

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MIRA: A Multi-layered On-Chip Interconnect Router Architecture.

Please choose a person to relate this publication to

K Mishra

Asit Datta

Asit Dan

Asit Choudhuri

Dushyant Mishra

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Mishra, Asit K."

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML MIRA: A Multi-layered On-Chip Interconnect Router Architecture.

Please choose a person to relate this publication to

K Mishra

Asit Datta

Asit Dan

Asit Choudhuri

Dushyant Mishra

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

MIRA: A Multi-layered On-Chip Interconnect Router Architecture.