Author of the publication

Soft Error Characterization on Scientific Applications.

, , , and . DASC/PiCom/DataCom/CyberSciTech, page 592-599. IEEE Computer Society, (2018)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

Cache Hierarchy-Aware Query Mapping on Emerging Multicore Architectures., , , , and . IEEE Trans. Computers, 66 (3): 403-415 (2017)Design of a Host Interface Logic for GC-Free SSDs., , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 39 (8): 1674-1687 (2020)GSSA: A Resource Allocation Scheme Customized for 3D NAND SSDs., , , , , and . HPCA, page 426-439. IEEE, (2021)CASH: compiler assisted hardware design for improving DRAM energy efficiency in CNN inference., , , , , and . MEMSYS, page 396-407. ACM, (2019)Quantization for Bayesian Deep Learning: Low-Precision Characterization and Robustness., , , , , , , , and . IISWC, page 180-192. IEEE, (2023)Optimizing energy consumption in GPUS through feedback-driven CTA scheduling., , , and . SpringSim (HPC), page 12:1-12:12. ACM, (2017)ResiRCA: A Resilient Energy Harvesting ReRAM Crossbar-Based Accelerator for Intelligent Embedded Processors., , , , , , , , and . HPCA, page 315-327. IEEE, (2020)Fifer: Tackling Resource Underutilization in the Serverless Era., , , , and . Middleware, page 280-295. ACM, (2020)Incidental computing on IoT nonvolatile processors., , , , , , , and . MICRO, page 204-218. ACM, (2017)Co-optimizing memory-level parallelism and cache-level parallelism., , , and . PLDI, page 935-949. ACM, (2019)