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Disambiguation of "Chen, Wei-Zen"

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A 32 Gb/s PAM-4 Optical Transceiver With Active Back Termination in 40 nm CMOS Technology.

, , , and . IEEE Open J. Circuits Syst., (2021)

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Wei Chen

Wei Chen

Wei Chen

Wei Chen

Wei Chen

 

Other publications of authors with the same name

A 7.1 mW, 10 GHz All Digital Frequency Synthesizer With Dynamically Reconfigured Digital Loop Filter in 90 nm CMOS Technology., , and . IEEE J. Solid State Circuits, 45 (3): 578-586 (2010)Introduction to the Special Section on the 2020 Asian Solid-State Circuits Conference (A-SSCC)., , and . IEEE J. Solid State Circuits, 56 (10): 2900-2901 (2021)A Reference-Free Phase Noise Measurement Circuit Achieving 24.2 fs Periodic Jitter Sensitivity and 275 fsrms Resolution with Background Self-Calibration., and . VLSI Technology and Circuits, page 8-9. IEEE, (2022)A 0.6 V, 1.66mW energy harvester and audio driver for tympanic membrane transducer with wirelessly optical signal and power transfer., , , , and . ISCAS, page 874-877. IEEE, (2014)A 90-dB Omega 10-Gb/s Optical Receiver Analog Front-End in a 0.18µm CMOS Technology., and . IEEE Trans. Very Large Scale Integr. Syst., 15 (3): 358-365 (2007)A Low-Jitter Cell-Based Digitally Controlled Oscillator With Differential Multiphase Outputs., , and . IEEE Trans. Very Large Scale Integr. Syst., 23 (4): 766-770 (2015)Session 11 Overview: Advanced Wireline Links and Techniques Wireline Subcommittee., , and . ISSCC, page 178-179. IEEE, (2021)A 0.4V 53dB SNDR 250 MS/s time-based CT ΔΣ analog to digital converter., , and . ASICON, page 1-4. IEEE, (2015)A 50 Gb/s PAM-4 Transmitter with Feedforward Equalizer and Background Phase Error Calibration., and . A-SSCC, page 1-2. IEEE, (2020)A 3.12 pJ/bit, 19-27 Gbps receiver with 2 Tap-DFE embedded clock and data recovery., and . A-SSCC, page 277-280. IEEE, (2014)