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A Heuristic Approach for Embedding Communication Patterns in an Interconnection Cached Parallel Processing Network., and . IPPS, page 291-297. IEEE Computer Society, (1993)Embedding classical communication topologies in the OPAM architecture., and . SPDP, page 482-485. IEEE Computer Society, (1991)Flow: A Stream Processing System Simulator., , , , , , and . PADS, page 97-105. IEEE Computer Society, (2010)Task Graph Partitioning and Mapping in a Reconfigurable Parallel Architecture., and . Parallel Process. Lett., (1995)NetSim - A Tool for Medling the Performance of Circuit Switched Multicomputer Networks., and . Computer Performance Evaluation, volume 794 of Lecture Notes in Computer Science, page 180-192. Springer, (1994)Analysis of a Control Mechanism for a Variable Speed Processor., , , and . IEEE Trans. Computers, 45 (7): 793-801 (1996)Parallel Graph Contraction with Applications to a Reconfigurable Parallel Architecture., and . ICPP (3), page 258-265. CRC Press, (1994)Hierarchical Interconnection Cache Networks., and . IPPS, page 135-141. IEEE Computer Society, (1993)Towards flexible exascale stream processing system simulation., , , , , , and . Simulation, 88 (7): 832-851 (2012)Performance analysis of a synchronous, circuit-switched interconnection cached network., and . International Conference on Supercomputing, page 246-255. ACM, (1994)