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Exploiting fast carry-chains of FPGAs for designing compressor trees., , and . FPL, page 242-249. IEEE, (2009)A Low-Cost Field-Programmable Pin-Constrained Digital Microfluidic Biochip., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 33 (11): 1657-1670 (2014)Virtual Ways: Low-Cost Coherence for Instruction Set Extensions with Architecturally Visible Storage., , , , and . ACM Trans. Archit. Code Optim., 11 (2): 15:1-15:26 (2014)Data-Flow Transformations to Maximize the Use of Carry-Save Representation in Arithmetic Circuits., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 27 (10): 1761-1774 (2008)Dynamic Radial Placement and Routing in Paper Microfluidics., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 40 (10): 1971-1984 (2021)Reducing Microfluidic Very Large-Scale Integration (mVLSI) Chip Area by Seam Carving., , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 40 (10): 2104-2116 (2021)Automatic Application of Power Analysis Countermeasures., , , , , and . IEEE Trans. Computers, 64 (2): 329-341 (2015)Way Stealing: A Unified Data Cache and Architecturally Visible Storage for Instruction Set Extensions., , , and . IEEE Trans. Very Large Scale Integr. Syst., 22 (1): 62-75 (2014)Compressor tree synthesis on commercial high-performance FPGAs., , , and . ACM Trans. Reconfigurable Technol. Syst., 4 (4): 39:1-39:19 (2011)An FPGA Logic Cell and Carry Chain Configurable as a 6: 2 or 7: 2 Compressor., , and . ACM Trans. Reconfigurable Technol. Syst., 2 (3): 19:1-19:42 (2009)