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Disambiguation of "Portal, Jean-Michel"

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Binary ReRAM-based BNN first-layer implementation.

, , , , , , , , and . DATE, page 1-6. IEEE, (2023)

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Jean-Michel Langlais

Jean-Michel Dengler

Jean-Michel Grossenbacher

Jean-Michel Autebert

Jean-Michel Ayache

 

Other publications of authors with the same name

Temperature and hump effect impact on output voltage spread of low power bandgap designed in the sub-threshold area., , , , , , and . ISCAS, page 2549-2552. IEEE, (2011)SRAM-based FPGA's: testing the LUT/RAM modules., , , and . ITC, page 1102-1111. IEEE Computer Society, (1998)Analytical study of complementary memristive synchronous logic gates., , , , , , , , , and 3 other author(s). NANOARCH, page 70-75. IEEE Computer Society, (2013)Crossbar architecture based on 2R complementary resistive switching memory cell., , , , , , , , , and 2 other author(s). NANOARCH, page 85-92. ACM, (2012)CAPC: A Configurable Analog Pop-Count Circuit for Near-Memory Binary Neural Networks., , , , , , , , and . MWSCAS, page 158-161. IEEE, (2021)Dynamic power reduction through process and design optimizations on CMOS 80 nm embedded non-volatile memories technology., , , , , , , , , and 2 other author(s). MWSCAS, page 897-900. IEEE, (2014)A Novel Low Power Oriented Design Methodology for Analog Blocks., , , and . J. Low Power Electron., 4 (1): 60-67 (2008)Testing the Local Interconnect Resources of SRAM-Based FPGA's., , , and . J. Electron. Test., 16 (5): 513-520 (2000)Powering AI at the Edge: A Robust, Memristor-based Binarized Neural Network with Near-Memory Computing and Miniaturized Solar Cell., , , , , , , , , and 6 other author(s). CoRR, (2023)Model of the Weak Reset Process in HfOx Resistive Memory for Deep Learning Frameworks., , , , , , , , and . CoRR, (2021)