Author of the publication

C5M-a control-logic layout synthesis system for high-performance microprocessors.

, and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 17 (1): 14-23 (1998)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

Optimal Chaining of CMOS Transistors in a Functional Cell., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 6 (5): 795-801 (1987)An efficient algorithm for some multirow layout problems., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 12 (8): 1178-1185 (1993)Depth-first-search and dynamic programming algorithms for efficient CMOS cell generation., , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 8 (7): 737-743 (1989)Ranking intervals under visibility constraints., , , , and . Int. J. Comput. Math., 34 (3-4): 129-144 (1990)C5M - a control logic layout synthesis system for high-performance microprocessors., and . ISPD, page 110-115. ACM, (1997)C5M-a control-logic layout synthesis system for high-performance microprocessors., and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 17 (1): 14-23 (1998)