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Disambiguation of "Amarnath, Chandramouli N."

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Low Power Neural Network Accelerators Using Collaborative Weight Tuning and Shared Shift-Add optimization.

, , , and . MWSCAS, page 1-4. IEEE, (2022)

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Badrish Chandramouli

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Chandramouli Chillakuri

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Other publications of authors with the same name

A Novel Approach to Error Resilience in Online Reinforcement Learning., and . IOLTS, page 1-7. IEEE, (2023)LARS-VSA: A Vector Symbolic Architecture For Learning with Abstract Rules., , and . CoRR, (2024)Learning Assisted Post-Manufacture Testing and Tuning of RRAM-Based DNNs for Yield Recovery., , , and . DATE, page 1-6. IEEE, (2024)Error Resilient Hyperdimensional Computing Using Hypervector Encoding and Cross-Clustering., , and . VTS, page 1-7. IEEE, (2024)Signature Driven Post-Manufacture Testing and Tuning of RRAM Spiking Neural Networks for Yield Recovery., , , and . ASPDAC, page 740-745. IEEE, (2024)Encoded Check Driven Concurrent Error Detection in Particle Filters for Nonlinear State Estimation., , and . IOLTS, page 1-6. IEEE, (2020)OATT: Outlier Oriented Alternative Testing and Post-Manufacture Tuning of Mixed-Signal/RF Circuits and Systems., , , and . ITC, page 37-46. IEEE, (2023)Error Resilient Transformers: A Novel Soft Error Vulnerability Guided Approach to Error Checking and Suppression., , and . ETS, page 1-6. IEEE, (2023)Error Resilient Neuromorphic Systems Using Embedded Predictive Neuron Checks., and . LATS, page 1-2. IEEE, (2023)Efficient Low Cost Alternative Testing of Analog Crossbar Arrays for Deep Neural Networks., , , and . ITC, page 499-503. IEEE, (2022)