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19.5 An HCI-healing 60GHz CMOS transceiver., , , , , , , , , and 6 other author(s). ISSCC, page 1-3. IEEE, (2015)Design and scalability analysis of bandwidth-compressed stream computing with multiple FPGAs., , , , and . ReCoSoC, page 1-8. IEEE, (2017)Exploring Inter-tile Connectivity for HPC-oriented CGRA with Lower Resource Usage., , , , , , and . FPT, page 1-4. IEEE, (2022)Automated parallel execution of distributed task graphs with FPGA clusters., , , , , , , , and . Future Gener. Comput. Syst., (2024)FPGA-based Stream Computing for High-Performance N-Body Simulation using Floating-Point DSP Blocks., , and . HEART, page 16:1-16:6. ACM, (2017)A 0.0055mm2 480µW Fully Synthesizable PLL Using Stochastic TDC in 28nm FDSOI., , , , , , , , and . IEICE Trans. Electron., 99-C (6): 632-640 (2016)ESSPER: Elastic and Scalable FPGA-Cluster System for High-Performance Reconfigurable Computing with Supercomputer Fugaku., , , and . HPC Asia, page 140-150. ACM, (2023)Hardware Specialization: Estimating Monte Carlo Cross-Section Lookup Kernel Performance and Area., , , , , , and . SC Workshops, page 1274-1278. ACM, (2023)Performance Analysis of Hardware-Based Numerical Data Compression on Various Data Formats., , and . DCC, page 345-354. IEEE, (2018)FPGA-Dedicated Network vs. Server Network for Pipelined Computing with Multiple FPGAs., , and . HEART, page 90-91. ACM, (2022)