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A 9.7fJ/Conv.-Step Capacitive Sensor Readout Circuit with Incremental Zoomed Time Domain Quantization.

Z. Shen, X. Tang, Z. Wu, H. Luo, Z. Wang, M. Liu, X. Zhang, and Y. Wang. CICC, page 1-2. IEEE, (2023)

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Xiyuan Bai

Xiyuan Liu

Tang Tang

Xiyuan Hu

Other publications of authors with the same name

S2-PM: semi-supervised learning for efficient performance modeling of analog and mixed signal circuits.M. Alawieh, X. Tang, and D. Pan. ASP-DAC, page 268-273. ACM, (2019)Error-Feedback Mismatch Error Shaping for High-Resolution Data Converters.J. Liu, C. Hsu, X. Tang, S. Li, G. Wen, and N. Sun. IEEE Trans. Circuits Syst. I Regul. Pap., 66-I (4): 1342-1354 (2019)MAGICAL 1.0: An Open-Source Fully-Automated AMS Layout Synthesis Framework Verified With a 40-nm 1GS/s Δ∑ ADC.H. Chen, M. Liu, X. Tang, K. Zhu, A. Mukherjee, N. Sun, and D. Pan. CICC, page 1-2. IEEE, (2021)10.4 A 3.7mW 12.5MHz 81dB-SNDR 4th-Order CTDSM with Single-OTA and 2nd-Order NS-SAR.W. Shi, J. Liu, A. Mukherjee, X. Yang, X. Tang, L. Shen, W. Zhao, and N. Sun. ISSCC, page 170-172. IEEE, (2021)Towards Decrypting the Art of Analog Layout: Placement Quality Prediction via Transfer Learning.M. Liu, K. Zhu, J. Gu, L. Shen, X. Tang, N. Sun, and D. Pan. DATE, page 496-501. IEEE, (2020)A SAR ADC with Reduced kT/C Noise by Decoupling Noise PSD and BW.Z. Li, A. Dutta, A. Mukherjee, X. Tang, L. Shen, L. He, and N. Sun. VLSI Circuits, page 1-2. IEEE, (2020)A 2.4-GHz ΔΣ Fractional-N Synthesizer with Space-Time Averaging for Noise Reduction.Y. Zhang, A. Sanyal, X. Quan, K. Wen, X. Tang, G. Jin, L. Geng, and N. Sun. CICC, page 1-4. IEEE, (2019)A 150kHz-BW 15-ENOB Incremental Zoom ADC with Skipped Sampling and Single Buffer Embedded Noise-Shaping SAR Quantizer.Z. Wang, L. Jie, Z. Kong, M. Zhan, Y. Zhong, Y. Wang, and X. Tang. ISSCC, page 176-177. IEEE, (2023)A 0.37mm2 250kHz-BW 95dB-SNDR CTDSM with Low-Cost 2nd-order Vector-Quantizer DEM.W. Shi, X. Wang, X. Tang, A. Mukherjee, R. Theertham, S. Pavan, L. Jie, and N. Sun. CICC, page 1-2. IEEE, (2022)A 10-bit 120-MS/s SAR ADC With Reference Ripple Cancellation Technique.Y. Shen, X. Tang, L. Shen, W. Zhao, X. Xin, S. Liu, Z. Zhu, V. Sathe, and N. Sun. IEEE J. Solid State Circuits, 55 (3): 680-692 (2020)

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Disambiguation of "Tang, Xiyuan"

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A 9.7fJ/Conv.-Step Capacitive Sensor Readout Circuit with Incremental Zoomed Time Domain Quantization.

Please choose a person to relate this publication to

Xiyuan Bai

Xiyuan Liu

Xiyuan Liu

Tang Tang

Xiyuan Hu

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Tang, Xiyuan"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML A 9.7fJ/Conv.-Step Capacitive Sensor Readout Circuit with Incremental Zoomed Time Domain Quantization.

Please choose a person to relate this publication to

Xiyuan Bai

Xiyuan Liu

Xiyuan Liu

Tang Tang

Xiyuan Hu

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
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URL
DOI
BibTeX
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APA
Chicago
DIN 1505
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A 9.7fJ/Conv.-Step Capacitive Sensor Readout Circuit with Incremental Zoomed Time Domain Quantization.