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Disambiguation of "Póvoa, Ricardo"

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Using Polynomial Regression and Artificial Neural Networks for Reusable Analog IC Sizing.

, , , , , , , and . SMACD, page 13-16. IEEE, (2019)

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Ricardo Seminario

Ricardo Scherer

Ricardo Riegel

Ricardo Sichel

Ricardo Osorio

 

Other publications of authors with the same name

A Low Noise CMOS Inverter-Based OTA for and Healthcare Signal Receivers., , , , , and . SMACD, page 161-164. IEEE, (2019)Using Polynomial Regression and Artificial Neural Networks for Reusable Analog IC Sizing., , , , , , , and . SMACD, page 13-16. IEEE, (2019)Artificial Neural Networks as an Alternative for Automatic Analog IC Placement., , , , , and . SMACD, page 1-4. IEEE, (2019)FUZYE: A Fuzzy c-Means Analog IC Yield Optimization Using Evolutionary-Based Algorithms., , , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 39 (1): 1-13 (2020)Second-order compensation BGR with low TC and high performance for space applications., , , and . Integr., (2018)DeepPlacer: A custom integrated OpAmp placement tool using deep models., , , , and . Appl. Soft Comput., (2022)Shortening the gap between pre- and post-layout analog IC performance by reducing the LDE-induced variations with multi-objective simulated quantum annealing., , , and . Eng. Appl. Artif. Intell., (2021)Design and application of a CMOS active inductor at Ku band based on a multi-objective optimizer., , , , , , and . Integr., (2016)A new family of CMOS inverter-based OTAs for biomedical and healthcare applications., , , , , and . Integr., (2020)On the Exploration of Design Tradeoffs in Analog IC Placement with Layout-dependent Effects., , , and . SMACD, page 25-28. IEEE, (2019)