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Disambiguation of "Reinman, Glenn"

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Analysis of Noncoherent ASK Modulation-Based RF-Interconnect for Memory Interface.

, , , , , , , and . IEEE J. Emerg. Sel. Topics Circuits Syst., 2 (2): 200-209 (2012)

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Andreas Glennemeier

Eduardo Glenn Calvo

Glenn Verhovnik

Glenn Reinhardt

Glenn Lurman

 

Other publications of authors with the same name

Reconfigurable Accelerator Compute Hierarchy: A Case Study using Content-Based Image Retrieval., , , and . IISWC, page 276-287. IEEE, (2020)A Comparative Survey of Load Speculation Architectures., and . J. Instruction-Level Parallelism, (2000)Fool me twice: Exploring and exploiting error tolerance in physics-based animation., , , and . ACM Trans. Graph., 29 (1): 5:1-5:11 (2009)HC-Sim: a fast and exact l1 cache simulator with scratchpad memory co-simulation support., , and . CODES+ISSS, page 295-304. ACM, (2011)An automated design flow for 3D microarchitecture evaluation., , , , , and . ASP-DAC, page 384-389. IEEE, (2006)Reducing the Energy of Speculative Instruction Schedulers., , and . ICCD, page 641-646. IEEE Computer Society, (2005)In-Depth Analysis on Microarchitectures of Modern Heterogeneous CPU-FPGA Platforms., , , , , and . ACM Trans. Reconfigurable Technol. Syst., 12 (1): 4:1-4:20 (2019)FPGA-based Near Data Processing Platform Selection Using Fast Performance Modeling (WiP Paper)., , and . LCTES, page 151-155. ACM, (2020)Microarchitecture evaluation with floorplanning and interconnect pipelining., , , , , , , and . ASP-DAC, page 8-15. ACM Press, (2005)An Evaluation of Deeply Decoupled Cores., , , , and . J. Instruction-Level Parallelism, (2006)