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Comparative Analysis of Conventional and Statistical Design Techniques., , , , , and . DAC, page 238-243. IEEE, (2007)The ISPD-2012 discrete cell sizing contest and benchmark suite., , , , , and . ISPD, page 161-164. ACM, (2012)Energy Efficient Architecture for Graph Analytics Accelerators., , , , , , and . ISCA, page 166-177. IEEE Computer Society, (2016)Learning from Experience: Applying ML to Analog Circuit Design., , , , , , , , , and 2 other author(s). ISPD, page 55. ACM, (2020)Reusing GEMM Hardware for Efficient Execution of Depthwise Separable Convolution on ASIC-Based DNN Accelerators., , , , , , and . ASP-DAC, page 475-482. ACM, (2023)A Charge Flow Formulation for Guiding Analog/Mixed-Signal Placement., , , , , , and . DATE, page 148-153. IEEE, (2022)Practical applications of an efficient time separation of events algorithm., , , and . ICCAD, page 146-151. IEEE Computer Society / ACM, (1993)An improved benchmark suite for the ISPD-2013 discrete cell sizing contest., , , , , and . ISPD, page 168-170. ACM, (2013)CAD Directions for High Performance Asynchronous Circuits., , , , , , and . DAC, page 116-121. ACM Press, (1999)An FPGA for Implementing Asynchronous Circuits., , , and . IEEE Des. Test Comput., 11 (3): 60-69 (1994)