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Disambiguation of "Jevtic, Ruzica"

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Technology Variability From a Design Perspective.

, , , , , , , , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 58-I (9): 1996-2009 (2011)

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Ruzica Susenburger

Ruzica Voitel

Ruzica Djenadic

 

Other publications of authors with the same name

Binary Division Power Models for High-Level Power Estimation of FPGA-Based DSP Circuits., , and . IEEE Trans. Ind. Informatics, 10 (1): 393-398 (2014)Switching Activity Models for Power Estimation in FPGA Multipliers., , and . ARC, volume 4419 of Lecture Notes in Computer Science, page 201-213. Springer, (2007)A complete dynamic power estimation model for data-paths in FPGA DSP designs., and . Integr., 45 (2): 172-185 (2012)Power estimation of dividers implemented in FPGAs., , and . ACM Great Lakes Symposium on VLSI, page 313-318. ACM, (2011)Per-Core DVFS With Switched-Capacitor Converters for Energy Efficiency in Manycore Processors., , , , , , and . IEEE Trans. Very Large Scale Integr. Syst., 23 (4): 723-730 (2015)Floorplan-based FPGA interconnect power estimation in DSP circuits., , and . SLIP, page 53-60. ACM, (2009)A Comparison of Approaches for High-Level Power Estimation of LUT-Based DSP Components., , and . ReConFig, page 361-366. IEEE Computer Society, (2008)Power Measurement Methodology for FPGA Devices., and . IEEE Trans. Instrum. Meas., 60 (1): 237-247 (2011)Methodology for Complete Decorrelation of Power Supply EM Side-Channel Signal and Sensitive Data., and . IEEE Trans. Circuits Syst. II Express Briefs, 69 (4): 2256-2260 (2022)Technology Variability From a Design Perspective., , , , , , , , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 58-I (9): 1996-2009 (2011)