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Disambiguation of "Patón, Susana"

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A superregenerative receiver for phase and frequency modulated carriers.

, and . ISCAS (3), page 81-84. IEEE, (2002)

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Giannino Patone

Susana Zapke

Susana Corotto

Susana Azpiazu

Susana Kusi

 

Other publications of authors with the same name

An A/D converter based on pulse width modulation and the walsh-hadamard transform., , and . ICECS, page 1217-1220. IEEE, (2008)A continuous-time noise-shaping modulator for logarithmic A/D conversion., and . ISCAS (2), page 364-367. IEEE, (1999)Continuous time sigma-delta modulators with transmission line resonators and improved jitter and excess loop delay performance., and . ISCAS (1), page 989-992. IEEE, (2003)A Gray-Encoded Ring Oscillator for Efficient Frequency-to-Digital Conversion in VCO-Based ADCs., , , , and . IEEE Trans. Circuits Syst. II Express Briefs, 70 (3): 870-874 (March 2023)Clock Jitter Analysis of Continuous-Time ΣΔ Modulators Based on a Relative Time-Base Projection., , , and . ISCAS, page 1. IEEE, (2020)Continuous Time Sigma-Delta Modulator with VCO-based integrators and optimized NTF zeros., , , , and . ICECS, page 470-473. IEEE, (2019)Idle Tones Reduction in Digital Single-Bit ΣΔ Modulators., , and . ISCAS, page 1-5. IEEE, (2019)Linearity enhancement techniques in low OSR, high clock rate multi-bit continuous-time sigma-delta modulators., , , , , , , and . CICC, page 527-530. IEEE, (2004)A noise coupled ΣΔ architecture using a Non Uniform Quantizer., , , , and . NORCAS, page 1-4. IEEE, (2015)Second-order multi-bit ΣΔ ADC using a Pulse-Width Modulated DAC and an integrating quantizer., , , and . ICECS, page 37-40. IEEE, (2009)