Author of the publication

Utilizing Radio-Frequency Interconnect for a Many-DIMM DRAM System.

, , , , , and . IEEE J. Emerg. Sel. Topics Circuits Syst., 2 (2): 210-227 (2012)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

A Comparative Survey of Load Speculation Architectures., and . J. Instruction-Level Parallelism, (2000)HC-Sim: a fast and exact l1 cache simulator with scratchpad memory co-simulation support., , and . CODES+ISSS, page 295-304. ACM, (2011)Fool me twice: Exploring and exploiting error tolerance in physics-based animation., , , and . ACM Trans. Graph., 29 (1): 5:1-5:11 (2009)An automated design flow for 3D microarchitecture evaluation., , , , , and . ASP-DAC, page 384-389. IEEE, (2006)Reconfigurable Accelerator Compute Hierarchy: A Case Study using Content-Based Image Retrieval., , , and . IISWC, page 276-287. IEEE, (2020)Reducing the Energy of Speculative Instruction Schedulers., , and . ICCD, page 641-646. IEEE Computer Society, (2005)An Evaluation of Deeply Decoupled Cores., , , , and . J. Instruction-Level Parallelism, (2006)In-Depth Analysis on Microarchitectures of Modern Heterogeneous CPU-FPGA Platforms., , , , , and . ACM Trans. Reconfigurable Technol. Syst., 12 (1): 4:1-4:20 (2019)Understanding Performance Gains of Accelerator-Rich Architectures., , , and . ASAP, page 239-246. IEEE, (2019)Microarchitecture evaluation with floorplanning and interconnect pipelining., , , , , , , and . ASP-DAC, page 8-15. ACM Press, (2005)