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Bayesian network early reliability evaluation analysis for both permanent and transient faults.

A. Vallero, A. Savino, S. Tselonis, N. Foutris, M. Kaliorakis, G. Politano, D. Gizopoulos, and S. Carlo. IOLTS, page 7-12. IEEE, (2015)

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Sotiris Manitsaris

Sotiris Mitralexis

Sotiris Moschoyiannis

Other publications of authors with the same name

GUFI: A framework for GPUs reliability assessment.S. Tselonis, and D. Gizopoulos. ISPASS, page 90-100. IEEE Computer Society, (2016)Microprocessor reliability-performance tradeoffs assessment at the microarchitecture level.S. Tselonis, M. Kaliorakis, N. Foutris, G. Papadimitriou, and D. Gizopoulos. VTS, page 1-6. IEEE Computer Society, (2016)Bayesian network early reliability evaluation analysis for both permanent and transient faults.A. Vallero, A. Savino, S. Tselonis, N. Foutris, M. Kaliorakis, G. Politano, D. Gizopoulos, and S. Carlo. IOLTS, page 7-12. IEEE, (2015)The functional and performance tolerance of GPUs to permanent faults in registers.S. Tselonis, V. Dimitsas, and D. Gizopoulos. IOLTS, page 236-239. IEEE, (2013)Cross-layer system reliability assessment framework for hardware faults.A. Vallero, A. Savino, G. Politano, S. Carlo, A. Chatzidimitriou, S. Tselonis, M. Kaliorakis, D. Gizopoulos, M. Riera, R. Canal and 4 other author(s). ITC, page 1-10. IEEE, (2016)Differential Fault Injection on Microarchitectural Simulators.M. Kaliorakis, S. Tselonis, A. Chatzidimitriou, N. Foutris, and D. Gizopoulos. IISWC, page 172-182. IEEE Computer Society, (2015)Microarchitecture level reliability comparison of modern GPU designs: First findings.A. Vallero, S. Carlo, S. Tselonis, and D. Gizopoulos. ISPASS, page 129-130. IEEE Computer Society, (2017)A Bayesian model for system level reliability estimation.A. Vallero, A. Savino, S. Tselonis, N. Foutris, M. Kaliorakis, G. Politano, D. Gizopoulos, and S. Carlo. ETS, page 1-2. IEEE, (2015)Cross-layer reliability evaluation, moving from the hardware architecture to the system level: A CLERECO EU project overview.A. Vallero, S. Tselonis, N. Foutris, M. Kaliorakis, M. Kooli, A. Savino, G. Politano, A. Bosio, G. Natale, D. Gizopoulos and 1 other author(s). Microprocess. Microsystems, 39 (8): 1204-1214 (2015)Performance-aware reliability assessment of heterogeneous chips.A. Chatzidimitriou, M. Kaliorakis, S. Tselonis, and D. Gizopoulos. VTS, page 1-6. IEEE Computer Society, (2017)

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Disambiguation of "Tselonis, Sotiris"

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Bayesian network early reliability evaluation analysis for both permanent and transient faults.

Please choose a person to relate this publication to

Sotiris Manitsaris

Sotiris Mitralexis

Sotiris Moschoyiannis

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Tselonis, Sotiris"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Bayesian network early reliability evaluation analysis for both permanent and transient faults.

Please choose a person to relate this publication to

Sotiris Manitsaris

Sotiris Mitralexis

Sotiris Moschoyiannis

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
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history of this post
URL
DOI
BibTeX
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APA
Chicago
DIN 1505
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Bayesian network early reliability evaluation analysis for both permanent and transient faults.