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Disambiguation of "Roussel, Philippe"

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Gate oxide breakdown in FET devices and circuits: From nanoscale physics to system-level reliability.

, , , and . Microelectron. Reliab., 47 (4-5): 559-566 (2007)

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Nicolas Roussel

Kevin Roussel

Martin Roussel

Philippe Dreuw

Philippe Moisan

 

Other publications of authors with the same name

Editing First-Order Proofs: Programmed Rules vs Derived Rules., , and . SLP, page 92-98. IEEE-CS, (1984)Circuit and process co-design with vertical gate-all-around nanowire FET technology to extend CMOS scaling for 5nm and beyond technologies., , , , , , , , , and 6 other author(s). ESSDERC, page 102-105. IEEE, (2014)Estimation des titres viraux : une programmation pratique et fiable sur calculatrice de poche, et accessible par l'Internet., and . Monde des Util. Anal. Données, (2006)Approximating Standard Cell Delay Distributions by Reformulating the Most Probable Failure Point., , , , and . ERMAVSS@DATE, volume 1566 of CEUR Workshop Proceedings, page 13-16. CEUR-WS.org, (2016)Degradation mechanisms and lifetime assessment of Ge Vertical PIN photodetectors., , , , , , , and . OFC, page 1-3. IEEE, (2022)Insight to Data Retention loss in ferroelectric Hf0.5Zr0.5O2 pFET and nFET from simultaneous PV and IV measurements., , , , , , , , , and . VLSI Technology and Circuits, page 340-342. IEEE, (2022)Variability aware modeling for yield enhancement of SRAM and logic., , , and . DATE, page 1153-1158. IEEE, (2011)The birth of Prolog, and . History of Programming Languages, ACM Press/Addison-Wesley, (1996)Yield prediction for architecture exploration in nanometer technology nodes: : a model and case study for memory organizations., , , , and . CODES+ISSS, page 253-258. ACM, (2006)The defect-centric perspective of device and circuit reliability - From individual defects to circuits., , , , , , , , , and 5 other author(s). ESSDERC, page 218-225. IEEE, (2015)