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Algorithm and Hardware Co-design for Reconfigurable CNN Accelerator., , , , , , and . ASP-DAC, page 250-255. IEEE, (2022)Neuromorphic Design Using Reward-based STDP Learning on Event-Based Reconfigurable Cluster Architecture., , , and . ICONS, page 5:1-5:8. ACM, (2021)Systematic design space exploration for customisable multi-processor architectures., , and . ICSAMOS, page 57-64. IEEE, (2008)CusComNet: A customisable network for reconfigurable heterogeneous clusters., , , and . ASAP, page 9-16. IEEE Computer Society, (2011)Automating custom-precision function evaluation for embedded processors., , , , and . CASES, page 22-31. ACM, (2005)Accelerating parameter estimation for multivariate self-exciting point processes., and . FPGA, page 181-184. ACM, (2014)On-chip FPGA Debug Instrumentation for Machine Learning Applications., , , , and . FPGA, page 110-115. ACM, (2019)Implementing Graphics Shaders Using FPGAs., and . FPL, volume 3203 of Lecture Notes in Computer Science, page 1173. Springer, (2004)Serial Hardware Libraries for Reconfigurable Designs., , , and . FPL, volume 1673 of Lecture Notes in Computer Science, page 185-194. Springer, (1999)Compiling Ruby into FPGAs., and . FPL, volume 975 of Lecture Notes in Computer Science, page 188-197. Springer, (1995)