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Disambiguation of "Matsuzawa, Akira"

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Design of Interpolated Pipeline ADC Using Low-Gain Open-Loop Amplifiers.

, , and . IEICE Trans. Electron., 96-C (6): 838-849 (2013)

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Akira Hayashima

Akira Hori

Akira Satake

Akira Hayashima

Akira Yasui

 

Other publications of authors with the same name

Feedforward compensation technique for all digital phase locked loop based synthesizers., , and . ISCAS, IEEE, (2006)Radio receiver front-end using time-based all-digital ADC (TAD)., , , , , , , , , and 3 other author(s). ICECS, page 471-473. IEEE, (2014)A CMOS direct sampling mixer using Switched Capacitor Filter technique for software-defined radio., , , , and . ASP-DAC, page 103-104. IEEE, (2008)A CMOS Smart Image Sensor LSI for Focal-Plane Compression., , , , , , , and . ASP-DAC, page 339-340. IEEE, (1998)A 7GS/s direct digital frequency synthesizer with a two-times interleaved RDAC in 65nm CMOS., , and . ESSCIRC, page 151-154. IEEE, (2017)A 6 bit, 7 mW, 700 MS/s Subranging ADC Using CDAC and Gate-Weighted Interpolation., , , and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 96-A (2): 422-433 (2013)A 0.5-V, 0.05-to-3.2 GHz LC-Based Clock Generator for Substituting Ring Oscillators under Low-Voltage Condition., , and . IEICE Trans. Electron., 95-C (7): 1285-1296 (2012)Characterization of Crossing Transmission Line Using Two-Port Measurements for Millimeter-Wave CMOS Circuit Design., , , , , and . IEICE Trans. Electron., 98-C (1): 35-44 (2015)A Study of Stability and Phase Noise of Tail Capacitive-Feedback VCOs., , and . IEICE Trans. Electron., 96-C (4): 577-585 (2013)A 72.4dB-SNDR 20MHz-Bandwidth Continuous-Time ΔΣ ADC with High-Linearity Gm-Cells., , , and . IEICE Trans. Electron., 101-C (4): 197-205 (2018)