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Saving Power by Synthesizing Gated Clocks for Sequential Circuits., , and . IEEE Des. Test Comput., 11 (4): 32-41 (1994)A Study on the Programming Structures for RRAM-Based FPGA Architectures., , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 63-I (4): 503-516 (2016)Analysis and Optimization of MPSoC Reliability., , , , and . J. Low Power Electron., 2 (1): 56-69 (2006)Inter-Plane Communication Methods for 3-D ICs., , and . J. Low Power Electron., 8 (2): 170-181 (2012)Dynamic Power Management for Nonstationary Service Requests., , , , and . IEEE Trans. Computers, 51 (11): 1345-1361 (2002)Reversible Pebble Games for Reducing Qubits in Hierarchical Quantum Circuit Synthesis., , , , and . ISMVL, page 102-107. IEEE, (2019)Representation of Medical Guidelines with a Computer Interpretable Model., , , , and . Int. J. Artif. Intell. Tools, (2014)An Integrated Control and Readout Circuit for Implantable Multi-Target Electrochemical Biosensing., , , , and . IEEE Trans. Biomed. Circuits Syst., 8 (6): 891-898 (2014)Efficient Statistical Parameter Selection for Nonlinear Modeling of Process/Performance Variation., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 35 (12): 1995-2007 (2016)Designing high-performance digital circuits using wave pipelining: algorithms and practical experiences., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 12 (1): 25-46 (1993)