Author of the publication

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

120V/ns output slew rate enhancement technique and high voltage clamping circuit in high integrated gate driver for power GaN FETs.

H. Yang, C. Chiu, S. Lai, J. Chen, C. Chang, C. Meng, K. Chen, C. Wey, Y. Lin, C. Lee, J. Lin, T. Tsai, and H. Luo. ESSCIRC, page 291-294. IEEE, (2015)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Tsing-Tshih Tsung

Jieh-Wen Tsung

Yen Yen Kwan

Tina Yener

Nazlı Yener Aǧabeyoǧlu

Other publications of authors with the same name

Instruction-Cycle-Based Dynamic Voltage Scaling Power Management for Low-Power Digital Signal Processor With 53% Power Savings.S. Peng, T. Huang, Y. Lee, C. Chiu, K. Chen, Y. Lin, C. Lee, T. Tsai, C. Huang, L. Chen and 1 other author(s). IEEE J. Solid State Circuits, 48 (11): 2649-2661 (2013)±3% voltage variation and 95% efficiency 28nm constant on-time controlled step-down switching regulator directly supplying to Wi-Fi systems.W. Chen, Y. Huang, M. Chien, Y. Chou, H. Chen, Y. Su, K. Chen, C. Wey, Y. Lin, T. Tsai and 2 other author(s). VLSIC, page 1-2. IEEE, (2014)Implantable biomedical device supplying by a 28nm CMOS self-calibration DC-DC buck converter with 97% output voltage accuracy.T. Yang, R. Huang, Y. Su, Balakumar, K. Chen, T. Tsai, J. Lin, Y. Lin, C. Lee, and P. Tseng. ISCAS, page 1366-1369. IEEE, (2015)A 20MS/s buck/boost supply modulator for envelope tracking applications with direct digital interface.S. Yang, C. Wey, K. Chen, Y. Lin, J. Chen, T. Tsai, and C. Lee. A-SSCC, page 73-76. IEEE, (2014)Ultra-low voltage ripple in DC-DC boost converter by the pumping capacitor and wire inductance technique.C. Tang, K. Chen, C. Wey, Y. Lin, J. Lin, and T. Tsai. A-SSCC, page 301-304. IEEE, (2016)A Pseudo-Ramp Controlled Three Level Buck Converter with an Auto-Ripple Cancellation Technique for Low Output Voltage Ripple in Sub-Threshold Applications.L. Chu, S. Chen, K. Chen, Y. Lin, S. Lin, and T. Tsai. ESSCIRC, page 122-125. IEEE, (2018)A low quiescent current and cross regulation single-inductor dual-output converter with stacking MOSFET driving technique.Y. Ma, W. Yang, Y. Lin, H. Chen, L. Lin, K. Chen, C. Wey, Y. Lin, J. Lin, T. Tsai and 1 other author(s). ESSCIRC, page 352-355. IEEE, (2017)Unsymmetrical parallel switched-capacitor (UP-SC) regulator with fast searching optimum ratio technique.Y. Lin, W. Yang, Y. Ma, Y. Lai, H. Chen, K. Chen, C. Wey, Y. Lin, J. Lin, and T. Tsai. ESSCIRC, page 287-290. IEEE, (2017)Triple Binary SAR Control in Distributive Digital Low Dropout Regulators for 3.6ns Fast Transient Response and 0.4mV Low Output Voltage Ripple.B. Wu, T. Wu, S. Lee, K. Chen, Y. Lin, S. Lin, and T. Tsai. ISCAS, page 2919-2922. IEEE, (2022)A Dual-Mode Seamless Transition Low-Dropout Regulator with Improved Load Transient Response for RF Energy-Harvesting Application.T. Tzeng, S. Lee, K. Chen, Y. Lin, S. Lin, and T. Tsai. ISCAS, page 3058-3062. IEEE, (2022)

BibSonomy

Disambiguation of "Tsai, Tsung-Yen"

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

120V/ns output slew rate enhancement technique and high voltage clamping circuit in high integrated gate driver for power GaN FETs.

Please choose a person to relate this publication to

Tsing-Tshih Tsung

Jieh-Wen Tsung

Yen Yen Kwan

Tina Yener

Nazlı Yener Aǧabeyoǧlu

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Tsai, Tsung-Yen"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML 120V/ns output slew rate enhancement technique and high voltage clamping circuit in high integrated gate driver for power GaN FETs.

Please choose a person to relate this publication to

Tsing-Tshih Tsung

Jieh-Wen Tsung

Yen Yen Kwan

Tina Yener

Nazlı Yener Aǧabeyoǧlu

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

120V/ns output slew rate enhancement technique and high voltage clamping circuit in high integrated gate driver for power GaN FETs.