Author of the publication

Fetch Gating Control Through Speculative Instruction Window Weighting.

, and . HiPEAC, volume 4367 of Lecture Notes in Computer Science, page 120-135. Springer, (2007)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

Optimizing Memory Throughput In a Tightly Coupled Multiprocessor., and . ICPP, page 344-346. Pennsylvania State University Press, (1987)Data Synchronized Pipeline Architecture: Pipelining in Multiprocessor Environments., and . J. Parallel Distributed Comput., 3 (4): 508-526 (1986)HAVEGE: A user-level software heuristic for generating empirically strong random numbers., and . ACM Trans. Model. Comput. Simul., 13 (4): 334-346 (2003)Fetch Gating Control through Speculative Instruction Window Weighting., and . Trans. High Perform. Embed. Archit. Compil., (2009)Topic 08+13: Instruction-Level Parallelism and Computer Architecture., , , , , , , and . Euro-Par, volume 2150 of Lecture Notes in Computer Science, page 385. Springer, (2001)Fetch Gating Control Through Speculative Instruction Window Weighting., and . HiPEAC, volume 4367 of Lecture Notes in Computer Science, page 120-135. Springer, (2007)Register sharing for equality prediction., , and . MICRO, page 4:1-4:12. IEEE Computer Society, (2016)Dictionary sharing: An efficient cache compression scheme for compressed caches., and . MICRO, page 1:1-1:12. IEEE Computer Society, (2016)DITVA: Dynamic Inter-Thread Vectorization Architecture., , , and . J. Parallel Distributed Comput., (2018)On the Interactions Between Value Prediction and Compiler Optimizations in the Context of EOLE., , and . ACM Trans. Archit. Code Optim., 14 (2): 18:1-18:24 (2017)