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Flip-Flop Selection for Mixed Scan and Reset Design Based on Test Generation and Structure of Sequential Circuits., and . J. Inf. Sci. Eng., 16 (5): 687-702 (2000)Modeling and testing of interference faults in the nano NAND Flash memory., , and . DATE, page 527-531. IEEE, (2012)All Digital Built-in Delay and Crosstalk Measurement for On-Chip Buses., , , , and . DATE, page 527-531. IEEE Computer Society / ACM, (2000)A programmable multiple-sequence generator for BIST applications., and . Asian Test Symposium, page 279-285. IEEE Computer Society, (1995)An Effective Methodology for Mixed Scan and Reset Design Based on Test Generation and Structure of Sequential Circuits., and . Asian Test Symposium, page 173-178. IEEE Computer Society, (1999)Arbitrary Waveform Generator Based on Direct Digital Frequency Synthesizer., , and . DELTA, page 567-570. IEEE Computer Society, (2008)A UWB mixer with a balanced wide band active balun using crossing centertaped inductor., , , and . ISCAS, page 1588-1591. IEEE, (2013)Algebraic Division for Multilevel Logic Synthesis of Multi-Valued Logic Circuits., , and . ISMVL, page 44-51. IEEE Computer Society, (1994)Distributed Fault Simulation for Sequential Circuits by Pattern Partitioning., , , and . EDAC-ETC-EUROASIC, page 661. IEEE Computer Society, (1994)A Parallel Pattern Mixed-Level Fault Simulator., , , and . DAC, page 716-719. IEEE Computer Society Press, (1990)