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Disambiguation of "Nguyen, Tuyet"

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A Distributed Critical-Path Timing Monitor for a 65nm High-Performance Microprocessor.

, , , , , , , , and . ISSCC, page 398-399. IEEE, (2007)

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Tuyet Mai Nguyen

Tuyet Le Nguyen Thi

Tuyet Minh Nguyen Thi

Vo Thi Anh Tuyet

Thi-Diep-Tuyet-Mai Nguyen

 

Other publications of authors with the same name

A 32nm 0.5V-supply dual-read 6T SRAM., , , , , , , , , and 5 other author(s). CICC, page 1-4. IEEE, (2010)Resonant clocking using distributed parasitic capacitance., , , , and . IEEE J. Solid State Circuits, 39 (9): 1520-1528 (2004)A Distributed Critical-Path Timing Monitor for a 65nm High-Performance Microprocessor., , , , , , , , and . ISSCC, page 398-399. IEEE, (2007)Gate Leakage Effects on Yield and Design Considerations of PD/SOI SRAM Designs., , , , , , , and . ISQED, page 33-40. IEEE Computer Society, (2007)A 32-bit PowerPC system-on-a-chip with support for dynamic voltage scaling and dynamic frequency scaling., , , , , , , and . IEEE J. Solid State Circuits, 37 (11): 1441-1447 (2002)On-chip jitter and oscilloscope circuits using an asynchronous sample clock., , , , , and . ESSCIRC, page 126-129. IEEE, (2008)An on-chip dual supply charge pump system for 45nm PD SOI eDRAM., , , , , , , , , and 3 other author(s). ESSCIRC, page 66-69. IEEE, (2008)Managing High Disease Risk Factors: a use case in the KMR-II Healthcare Infrastructure., , , , , , , and . RuleML America (2), volume 799 of CEUR Workshop Proceedings, CEUR-WS.org, (2011)Resonant clocking using distributed parasitic capacitance., , , , and . CICC, page 647-650. IEEE, (2003)A 1V 18GHz Clock Generator in a 65nm PD-SOI Technology., , , , , , and . ISSCC, page 312-313. IEEE, (2007)