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8.2 Fully integrated low-drop-out regulator based on event-driven PI control., and . ISSCC, page 148-149. IEEE, (2016)Temporarily Fine-Grained Sleep Technique for Near- and Subthreshold Parallel Architectures., and . IEEE Trans. Very Large Scale Integr. Syst., 25 (1): 189-197 (2017)MemNet: Memory-Efficiency Guided Neural Architecture Search with Augment-Trim learning., , , , and . CoRR, (2019)CDAR-DRAM: Enabling Runtime DRAM Performance and Energy Optimization via In-Situ Charge Detection and Adaptive Data Restoration., , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 42 (9): 3078-3091 (September 2023)Decoupling capacitor design strategy for minimizing supply noise of ultra low voltage circuits.. DAC, page 968-973. ACM, (2012)A fine-grained many VT design methodology for ultra low voltage operations.. ISLPED, page 161-166. ACM, (2012)Cases for Analog Mixed Signal Computing Integrated Circuits for Deep Neural Networks., , , , and . VLSI-DAT, page 1-2. IEEE, (2019)Register file circuits and post-deployment framework to monitor aging effects in field., , and . ESSCIRC, page 425-428. IEEE, (2016)High-Capacity Fingerprint Recognition System based on a Dynamic Memory-Capacity Estimation Technique., , , and . BioCAS, page 1-4. IEEE, (2018)A 0.5V 2.2pW 2-transistor voltage reference., , , and . CICC, page 577-580. IEEE, (2009)