( en | de | ru )

 

Disambiguation of "Thomas, Donald E."

Author of the publication

copydeleteadd this publication to your clipboard
Statistical Learning in Chip (SLIC).

, , , , , , , and . ICCAD, page 664-669. IEEE, (2015)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Donald E Barin-Baum

Thomas E Wanger

Thomas E Cowan

Thomas E Burman

Thomas E Abeltshauser

 

Other publications of authors with the same name

Address generation for memories containing multiple arrays., and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 17 (5): 377-385 (1998)Linking the Behavioral and Structural Domains of Representation for Digital System Design., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 6 (1): 103-110 (1987)Architectural partitioning for system level synthesis of integrated circuits., and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 10 (7): 847-860 (1991)Probing the State of the Art., and . IEEE Des. Test, 1 (3): 18-19 (1984)The VLSI Design Automation Assistant: An IBM System/370 Design., and . IEEE Des. Test, 1 (1): 60-69 (1984)Synthesis of application-specific memory designs., and . IEEE Trans. Very Large Scale Integr. Syst., 5 (1): 101-111 (1997)Co-RAM: combinational logic synthesis applied to software partitions for mapping to a novel memory device., , and . IEEE Trans. Very Large Scale Integr. Syst., 9 (6): 805-812 (2001)Architectural Partitioning for System Level Design., and . DAC, page 62-67. ACM Press, (1989)Synthesis of Pipelined Instruction Set Processors., and . DAC, page 583-588. ACM Press, (1993)The Verilog hardware description language (2. ed.)., and . Kluwer, (1995)