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A High Accuracy Multiple-Command Speech Recognition ASIC Based on Configurable One-Dimension Convolutional Neural Network.

L. Wu, Z. Wang, M. Zhao, W. Hu, Y. Cai, и R. Huang. ISCAS, стр. 1-4. IEEE, (2021)

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Ru-Jin Huang

Ru Zhang

Ru Xie

Tomasz Ru

Ru Hao

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Khronos: Fusing Memory Access for Improved Hardware RTL Simulation.K. Zhou, Y. Liang, Y. Lin, R. Wang, и R. Huang. MICRO, стр. 180-193. ACM, (2023)A A 22nm 0.43pJ/SOP Sparsity-Aware In-Memory Neuromorphic Computing System with Hybrid Spiking and Artificial Neural Network and Configurable Topology.Y. Liu, Z. Chen, Z. Wang, W. Zhao, W. He, J. Zhu, O. Wang, N. Zhang, T. Jia, Y. Ma и 2 other автор(ы). CICC, стр. 1-2. IEEE, (2023)A 0.13μm 64Mb HfOx ReRAM using configurable ramped voltage write and low read-disturb sensing techniques for reliability improvement.X. Han, Q. Jia, H. Sun, L. Wang, H. Wu, Y. Cai, F. Zhang, Y. Xie, F. Dong, X. Wang и 15 other автор(ы). CICC, стр. 1-4. IEEE, (2017)Sub-20-nm DRAM Technology under Negative Bias Temperature Instability (NBTI): from Characterization to Physical Origin Identification.D. Wang, Y. Xue, Y. Liu, P. Ren, Z. Sun, Z. Wang, Y. Liu, Z. Cheng, H. Yang, X. Liu и 5 other автор(ы). IRPS, стр. 9. IEEE, (2024)Accelerating Device-Circuit Self-Heating Simulations with Dynamic Time Evolution for GAAFET.S. Chen, Y. Li, B. Peng, Z. Sun, L. Zhang, R. Wang, и R. Huang. IRPS, стр. 7. IEEE, (2024)Combinational Access Tunnel FET SRAM for Ultra-Low Power Applications.L. Yang, J. Zhu, C. Chen, Z. Wang, Z. Liu, Q. Huang, L. Ye, и R. Huang. ISCAS, стр. 1-5. IEEE, (2018)A Spike-Event-Based Neuromorphic Processor with Enhanced On-Chip STDP Learning in 28nm CMOS.Y. Zhong, X. Cui, Y. Kuang, K. Liu, Y. Wang, и R. Huang. ISCAS, стр. 1-5. IEEE, (2021)Layout-dependent aging mitigation for critical path timing.C. Hsu, S. Guo, Y. Lin, X. Xu, M. Li, R. Wang, R. Huang, и D. Pan. ASP-DAC, стр. 153-158. IEEE, (2018)Accurate yet Efficient Stochastic Computing Neural Acceleration with High Precision Residual Fusion.Y. Hu, T. Zhang, R. Wei, M. Li, R. Wang, Y. Wang, и R. Huang. DATE, стр. 1-6. IEEE, (2023)ASTERS: adaptable threshold spike-timing neuromorphic design with twin-column ReRAM synapses.Z. Li, Q. Zheng, B. Yan, R. Huang, B. Li, и Y. Chen. DAC, стр. 1099-1104. ACM, (2022)

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