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Disambiguation of "Wu, Chung-Yu"

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A new high-performance CMOS GHz power amplifier design with common-mode signal cancellation technique.

, , and . APCCAS (2), page 395-398. IEEE, (2002)

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Chung Wu

Yu Wu

Chung-Hsiung Wu

Chung-Hsiung Wu

Chung-Hsiung Wu

 

Other publications of authors with the same name

An improved low-power CMOS direct-conversion transmitter for GHz wireless communication applications., and . APCCAS (1), page 5-8. IEEE, (2002)A 16-channel CMOS chopper-stabilized analog front-end acquisition circuits for ECoG detection., , and . ISCAS, page 1-4. IEEE, (2017)A Ratio-independent and Gain-insensitive Algorithmic Analog-to-digital Converter., and . ISCAS, page 1200-1203. IEEE, (1993)VHF Bandpass Filter Design Using CMOS Transresistance Amplifiers., , and . ISCAS, page 990-993. IEEE, (1993)A CMOS Expansion/Contraction Motion Sensor with a Retinal Processing Circuit for Z-motion Detection Applications., and . ISCAS, page 3087-3090. IEEE, (2007)Low-Voltage Low-Power CMOS True-Single-Phase Clocking Scheme with Locally Asynchronous Logic Circuits., , , , , and . ISCAS, page 1572-1575. IEEE, (1995)Complementary-LVTSCR ESD Protection Scheme for Submicron CMOS IC's., , , , and . ISCAS, page 833-836. IEEE, (1995)The Continuous-Time VHF Lowpass Filter Design Using Finite-Gain Current and Voltage Amplifiers and Special Q-Enhancement Circuit., and . ISCAS, page 771-774. IEEE, (1994)An 1.97μ, W/Ch 65nm-CMOS 8-Channel Analog Front-End Acquisition Circuit with Fast-Settling Hybrid DC Servo Loop for EEG Monitoring., , and . ISCAS, page 1-5. IEEE, (2018)Stability Analysis of Autonomous Ratio-Memory Cellular Nonlinear Networks for Pattern Recognition., , and . IEEE Trans. Circuits Syst. I Regul. Pap., 57-I (8): 2156-2167 (2010)