( en | de | ru )

 

Disambiguation

From post

копироватьудалитьдобавить публикацию в буфер
An effective BIST architecture for power-gating mechanisms in low-power SRAMs.

, , , , и . ISQED, стр. 185-191. IEEE, (2016)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed.

Luigi Sportelli

Luigi Busarello

Luigi Nardi

Luigi Monni

Luigi Poisson

 

Другие публикации лиц с тем же именем

Evaluation of the temperature influence on SEU vulnerability of DICE and 6T-SRAM cells., , , и . DTIS, стр. 1-5. IEEE, (2018)Effect-cause intra-cell diagnosis at transistor level., , , , , , и . ISQED, стр. 460-467. IEEE, (2013)A calculation method to estimate single event upset cross section., , , , , и . Microelectron. Reliab., (2017)Characterization of a RISC-V System-on-Chip under Neutron Radiation., , , , , , и . DTIS, стр. 1-6. IEEE, (2021)A Low-Cost Fault-Tolerant RISC-V Processor for Space Systems., , , , и . DTIS, стр. 1-5. IEEE, (2020)An effective ATPG flow for Gate Delay Faults., , , , , и . DTIS, стр. 1-6. IEEE, (2015)A built-in scheme for testing and repairing voltage regulators of low-power srams., , , , , , и . VTS, стр. 1-6. IEEE Computer Society, (2013)An effective hybrid fault-tolerant architecture for pipelined cores., , , , и . ETS, стр. 1-6. IEEE, (2015)Neutron detection in atmospheric environment through static and dynamic SRAM-based test bench., , , , , и . LATW, стр. 1-6. IEEE, (2011)Delay Fault Diagnosis in Sequential Circuits., , , , , , и . Asian Test Symposium, стр. 355-360. IEEE Computer Society, (2009)