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Evaluation of the temperature influence on SEU vulnerability of DICE and 6T-SRAM cells.

E. Farjallah, V. Gherman, J. Armani, and L. Dilillo. DTIS, page 1-5. IEEE, (2018)

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Valentin Gherman

Bogdan Gherman

Ilia Gherman

Valentin Döring

Heinrich Valentin

Other publications of authors with the same name

Efficient Pattern Mapping for Deterministic Logic BIST.V. Gherman, H. Wunderlich, H. Vranken, F. Hapke, M. Wittke, and M. Garbers. ITC, page 48-56. IEEE Computer Society, (2004)Error-correction schemes with erasure information for fast memories.S. Evain, and V. Gherman. ETS, page 1-6. IEEE Computer Society, (2013)System-level hardware-based protection of memories against soft-errors.V. Gherman, S. Evain, M. Cartron, N. Seymour, and Y. Bonhomme. DATE, page 1222-1225. IEEE, (2009)Error Correction Schemes with Erasure Information for Fast Memories.S. Evain, V. Savin, and V. Gherman. J. Electron. Test., 30 (2): 183-192 (2014)Error prediction based on concurrent self-test and reduced slack time.V. Gherman, J. Massas, S. Evain, S. Chevobbe, and Y. Bonhomme. DATE, page 1626-1631. IEEE, (2011)Shadow-scan design with low latency overhead and in-situ slack-time monitoring.S. Sarrazin, S. Evain, I. Panades, A. Valentian, S. Pajaniradja, L. de Barros Naviner, and V. Gherman. ETS, page 1-6. IEEE, (2014)Smart Write Algorithm to Enhance Performances and Reliability of an RRAM Macro.B. Giraud, S. Ricavy, C. Laffond, I. Sever, V. Gherman, F. Lepin, M. Diallo, K. Zenati, S. Dumas, O. Guille and 8 other author(s). IEEE J. Solid State Circuits, 59 (9): 3045-3057 (September 2024)Scan design with shadow flip-flops for low performance overhead and concurrent delay fault detection.S. Sarrazin, S. Evain, L. de Barros Naviner, Y. Bonhomme, and V. Gherman. DATE, page 1077-1082. EDA Consortium San Jose, CA, USA / ACM DL, (2013)Memory reliability improvements based on maximized error-correcting codes.V. Gherman, S. Evain, and Y. Bonhomme. European Test Symposium, page 1-6. IEEE Computer Society, (2012)Synthesis of irregular combinational functions with large don't care sets.V. Gherman, H. Wunderlich, R. Mascarenhas, J. Schlöffel, and M. Garbers. ACM Great Lakes Symposium on VLSI, page 287-292. ACM, (2007)

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Disambiguation of "Gherman, Valentin"

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Evaluation of the temperature influence on SEU vulnerability of DICE and 6T-SRAM cells.

Please choose a person to relate this publication to

Valentin Gherman

Bogdan Gherman

Ilia Gherman

Valentin Döring

Heinrich Valentin

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Gherman, Valentin"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Evaluation of the temperature influence on SEU vulnerability of DICE and 6T-SRAM cells.

Please choose a person to relate this publication to

Valentin Gherman

Bogdan Gherman

Ilia Gherman

Valentin Döring

Heinrich Valentin

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

Evaluation of the temperature influence on SEU vulnerability of DICE and 6T-SRAM cells.