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A 10-mW 16-b 15-MS/s Two-Step SAR ADC With 95-dB DR Using Dual-Deadzone Ring Amplifier.

, , , , , , , and . IEEE J. Solid State Circuits, 54 (12): 3410-3420 (2019)

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Voltage domain correction technique for timing skew errors in time interleaved ADCs., , , , and . ISCAS, page 1-4. IEEE, (2017)A 10-mW 16-b 15-MS/s Two-Step SAR ADC With 95-dB DR Using Dual-Deadzone Ring Amplifier., , , , , , , and . IEEE J. Solid State Circuits, 54 (12): 3410-3420 (2019)An Empirical Study of the Settling Performance of Ring Amplifiers for Pipelined ADCs., , , , , , and . ISCAS, page 1-5. IEEE, (2018)Application of Ring-Amplifiers for Low-Power Wide-Bandwidth Digital Subsampling ADC-PLL., , , , , and . ISCAS, page 1-5. IEEE, (2019)A Rail-to-Rail 12MS 91.3dB SNDR 94.1dB DR Two-Step SAR ADC with Integrated Input Buffer Using Predictive Level-Shifting., , , , , , and . ISSCC, page 172-173. IEEE, (2023)A Power Efficient SAR Algorithm for High Resolution ADCs., , , , , , and . ISCAS, page 1-5. IEEE, (2018)Power Optimized Comparator Selecting Method For Stochastic ADC., , , , , , and . ISCAS, page 1-4. IEEE, (2018)A Pseudo-Pseudo-Differential ADC Achieving 105dB SNDR in 10kHz Bandwidth Using Ring Amplifier Based Integrators., , , and . IEEE Trans. Circuits Syst. II Express Briefs, 68 (7): 2327-2331 (2021)11.1 A 1.7pJ/b 112Gb/s XSR Transceiver for Intra-Package Communication in 7nm FinFET Technology., , , , , , , , , and 3 other author(s). ISSCC, page 180-182. IEEE, (2021)Passive Compensation for Improved Settling and Large Signal Stabilization of Ring Amplifiers., , , , , , , and . ISCAS, page 1-5. IEEE, (2018)