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VLSI Design of RSA Cryptosystem Based on the Chinese Remainder Theorem.

, , and . J. Inf. Sci. Eng., 17 (6): 967-980 (2001)

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RSA cryptosystem design based on the Chinese remainder theorem., , and . ASP-DAC, page 391-395. ACM, (2001)A Lane Departure Warning System with FPGA modular design., , , , and . ICVES, page 201-204. IEEE, (2012)Radix-4 modular multiplication and exponentiation algorithms for the RSA public-key cryptosystem., and . ASP-DAC, page 565-570. ACM, (2000)An Efficient Area-Delay Product Design for MixColumns/InvMixColumns in AES., , , and . ISVLSI, page 503-506. IEEE Computer Society, (2008)Cellular-array modular multiplier for fast RSA public-key cryptosystem based on modified Booth's algorithm., and . IEEE Trans. Very Large Scale Integr. Syst., 11 (3): 474-484 (2003)Hierarchical system test by an IEEE 1149.5 MTM-bus slave-module interface core., , and . IEEE Trans. Very Large Scale Integr. Syst., 8 (5): 503-516 (2000)Sequential circuit fault simulation using logic emulation., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 17 (8): 724-736 (1998)Hierarchical Testing Using the IEEE Std 1149.5 Module Test and Maintenance Slave Interface Module., , and . Asian Test Symposium, page 50-55. IEEE Computer Society, (1996)A Novel and Scalable RSA Cryptosystem Based on 32-Bit Modular Multiplier., and . ISVLSI, page 483-486. IEEE Computer Society, (2008)Physical design optimizations for a high-resolution third-order sigma-delta modulator., and . FSKD, page 1961-1965. IEEE, (2015)