( en | de | ru )

 

Disambiguation of "Garg, Siddharth"

Author of the publication

copydeleteadd this publication to your clipboard
Generating and Characterizing Scenarios for Safety Testing of Autonomous Vehicles.

, , , , , , , and . IV, page 157-164. IEEE, (2021)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Neil Garg

Siddharth Kaza

Siddharth Nanguneri

Siddharth Hegde

Siddharth Ray

 

Other publications of authors with the same name

A Feature-Based On-Line Detector to Remove Adversarial-Backdoors by Iterative Demarcation., , , , and . IEEE Access, (2022)Bulls-Eye: Active Few-Shot Learning Guided Logic Synthesis., , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 42 (8): 2580-2590 (2023)Training Data Poisoning in ML-CAD: Backdooring DL-Based Lithographic Hotspot Detectors., , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 40 (6): 1244-1257 (2021)Adversarially Robust Learning via Entropic Regularization., , , and . CoRR, (2020)On Evaluating Neural Network Backdoor Defenses., and . CoRR, (2020)Path Planning Under Uncertainty to Localize mmWave Sources., , , , , , , , , and 1 other author(s). ICRA, page 3461-3467. IEEE, (2023)HaDeS: architectural synthesis for <u>h</u>eterogeneous <u>d</u>ark <u>s</u>ilicon chip multi-processors., , , and . DAC, page 173:1-173:7. ACM, (2013)Thundervolt: enabling aggressive voltage underscaling and timing error resilience for energy efficient deep learning accelerators., , , and . DAC, page 19:1-19:6. ACM, (2018)EmPower: FPGA based rapid prototyping of dynamic power management algorithms for multi-processor systems on chip., , , and . FPL, page 41-48. IEEE, (2012)BandiTS: Dynamic timing speculation using multi-armed bandit based optimization., and . DATE, page 922-925. IEEE, (2017)