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Disambiguation of "Gai, Weixin"

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Design Consideration of 6.25 Gbps Signaling for High-Performance Server.

, , , , , , and . ASP-DAC, page 854-857. IEEE Computer Society, (2007)

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Wenlin Gai

Weixin Huang

Weixin Li

Helmar Gai

Gai Sun

 

Other publications of authors with the same name

A novel 6-Gbps half-rate SST transmitter with impedance calibration and adjustable pre-emphasis., , and . ISCAS, page 341-344. IEEE, (2015)A Fully-Pipeline Linear Systolic Architecture for Modular Multiplier in Public-Key Crypto-Systems., , , and . VLSI Signal Processing, 33 (1-2): 191-197 (2003)A 14GHz Cascade Differential-Capacitor-Based DCO with Resistor-Biased Buffer., , , and . ISCAS, page 1-5. IEEE, (2021)A 2.29pJ/b 112Gb/s Wireline Transceiver with RX 4-Tap FFE for Medium-Reach Applications in 28nm CMOS., , , , , , , , and . ISSCC, page 118-120. IEEE, (2022)A 0.43pJ/b 200Gb/s 5-Tap Delay-Line-Based Receiver FFE with Low-Frequency Equalization in 28nm CMOS., , , , and . ISSCC, page 112-113. IEEE, (2023)Design of an Adaptive Loop Gain Controller Based on Auto-correlation Detection Scheme in All-Digital Phase-Locked Loop., , , , and . ASICON, page 1-4. IEEE, (2019)A 2.7-GHz digitally-controlled ring oscillator with supply sensitivity of 0.0014%-fDCO/1%-VDD using digital current-regulated tuning., and . ISCAS, page 2690-2693. IEEE, (2013)A Five-Tap Delay-Line-Based Feed-Forward-Equalizer for 200-Gb/s Wireline Receiver in 28-nm CMOS., , , , and . IEEE J. Solid State Circuits, 59 (1): 19-28 (January 2024)A 2-Bit 4-Level 4-Wire 56Gb/s Transceiver in 14nm FinFET., , , , and . ISCAS, page 1-5. IEEE, (2021)An 8-12GHz 0.92° Phase Error Quadrature Clock Generator Based on Two-Stage Poly Phase Filter with Intermediate Point Compensation., , , , and . ISCAS, page 1-5. IEEE, (2019)