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Disambiguation of "Verma, Ajay Kumar"

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Architectural improvements for field programmable counter arrays: enabling efficient synthesis of fast compressor trees on FPGAs.

, , , , , , , and . FPGA, page 181-190. ACM, (2008)

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Ajay Kumar Perumal

Sushil Kumar Verma

Ajay Kumar Gupta

Ajay Kumar Poddar

Sushil Kumar Verma

 

Other publications of authors with the same name

Architectural improvements for field programmable counter arrays: enabling efficient synthesis of fast compressor trees on FPGAs., , , , , , , and . FPGA, page 181-190. ACM, (2008)An optimistic and conservative register assignment heuristic for chordal graphs., , and . CASES, page 209-217. ACM, (2007)Challenges in Automatic Optimization of Arithmetic Circuits., , and . IEEE Symposium on Computer Arithmetic, page 213-218. IEEE Computer Society, (2009)Generating Distributed Query Processing Plans Using Genetic Algorithm., , and . DSDE, page 173-177. IEEE Computer Society, (2010)Deep learning based network similarity for model selection., , and . Data Sci., 4 (2): 63-83 (2021)Variable Latency Speculative Addition: A New Paradigm for Arithmetic Circuit Design., , and . DATE, page 1250-1255. ACM, (2008)Improved use of the carry-save representation for the synthesis of complex arithmetic circuits., and . ICCAD, page 791-798. IEEE Computer Society / ACM, (2004)Optimal polynomial-time interprocedural register allocation for high-level synthesis and ASIP design., , and . ICCAD, page 172-179. IEEE Computer Society, (2007)Combining algorithm exploration with instruction set design: a case study in elliptic curve cryptography., , , , and . DATE, page 218-223. European Design and Automation Association, Leuven, Belgium, (2006)Fast, quasi-optimal, and pipelined instruction-set extensions., , and . ASP-DAC, page 334-339. IEEE, (2008)