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Coherent Design of Hybrid Approximate Adders: Unified Design Framework and Metrics.

, , , and . IEEE J. Emerg. Sel. Topics Circuits Syst., 8 (4): 736-745 (2018)

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Moment-Based Estimation of Switching Activity for Correlated Distributions., , and . PATMOS, volume 3254 of Lecture Notes in Computer Science, page 859-868. Springer, (2004)On Timing and Power Consumption in Inductively Coupled On-Chip Interconnects., , , , , and . PATMOS, volume 3254 of Lecture Notes in Computer Science, page 819-828. Springer, (2004)Symbolic Circuit Analysis under an Arc Based Timing Model., and . ETS, page 1-2. IEEE, (2019)An FPGA-based thermal emulation framework for multicore systems., and . PATMOS, page 1-6. IEEE, (2017)Run-time schedulability check of real-time tasks for energy efficiency., and . PATMOS, page 114-119. IEEE, (2016)A framework for hardware-based DVFS management in multicore mixed-criticality systems., and . ReCoSoC, page 1-7. IEEE, (2015)Crosstalk optimization for through-silicon vias by exploiting temporal signal misalignment., , , and . Integr., (2019)Hardware-Assisted Signal Activity Analysis for Power Estimation in Rapid Prototyped Systems., , , and . Des. Autom. Embed. Syst., 8 (4): 297-308 (2003)Accelerator Framework of Spike-By-Spike Neural Networks for Inference and Incremental Learning in Embedded Systems., , , and . MOCAST, page 1-5. IEEE, (2020)Heterogeneous 3D Integration for a RISC-V System With STT-MRAM., , , , , , , , and . IEEE Comput. Archit. Lett., 19 (1): 51-54 (2020)