Author of the publication

Correctly implementing value prediction in microprocessors that support multithreading or multiprocessing.

, , , , and . MICRO, page 328-337. ACM/IEEE Computer Society, (2001)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

Performance Pathologies in Hardware Transactional Memory., , , , , , and . IEEE Micro, 28 (1): 32-41 (2008)Wisconsin Wind Tunnel II: a fast, portable parallel architecture simulator., , , , , , , and . IEEE Concurrency, 8 (4): 12-20 (2000)Lamport Clocks: Reasoning About Shared Memory Correctness, , , and . (1998)Interaction Cost: For When Event Counts Just Don't Add Up., , , and . IEEE Micro, 24 (6): 57-61 (2004)Implementing Sequential Consistency in Cache-Based Systems., and . ICPP (1), page 47-50. Pennsylvania State University Press, (1990)An evaluation of directory protocols for medium-scale shared-memory multiprocessors., and . International Conference on Supercomputing, page 64-74. ACM, (1994)Karma: scalable deterministic record-replay., , and . ICS, page 359-368. ACM, (2011)Why on-chip cache coherence is here to stay., , and . Commun. ACM, 55 (7): 78-89 (2012)Advanced Cyberinfrastructure for Science, Engineering, and Public Policy., , , , , , , and . CoRR, (2017)How computer architecture trends may affect future distributed systems: from infiniBand clusters to inter-processor speculation (abstract).. PODC, page 6. ACM, (2000)