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Conversion of artificial recurrent neural networks to spiking neural networks for low-power neuromorphic hardware.

, , , , and . ICRC, page 1-8. IEEE Computer Society, (2016)

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Building block of a programmable neuromorphic substrate: A digital neurosynaptic core., , , , , , , , , and 2 other author(s). IJCNN, page 1-8. IEEE, (2012)TrueHappiness: Neuromorphic emotion recognition on TrueNorth., , , , , and . IJCNN, page 4278-4285. IEEE, (2016)A high-level analytical model for application specific CMP design exploration., , , and . DATE, page 1095-1100. IEEE, (2011)Analytical methods for the design and optimization of chip-multiprocessor architectures., and . CISS, page 482-487. IEEE, (2009)Evaluating on-chip interconnects for low operating frequency silicon neuron arrays., , , and . ISCAS, page 2437-2440. IEEE, (2011)A combinational digital logic approach to STDP., , and . ISCAS, page 673-676. IEEE, (2011)A Switched Capacitor Implementation of the Generalized Linear Integrate-and-fire Neuron., , , , , , , and . ISCAS, page 2149-2152. IEEE, (2009)Design of a one million neuron single FPGA neuromorphic system for real-time multimodal scene analysis., , and . CISS, page 1-6. IEEE, (2011)A multimodal-corpus data collection system for cognitive acoustic scene analysis., , , , , , , , , and 7 other author(s). CISS, page 1-6. IEEE, (2011)A wireless architecture for distributed sensing/actuation and pre-processing with microsecond synchronization., , , , and . CISS, page 1-6. IEEE, (2011)