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FPGA Soft-Core Processors, Compiler and Hardware Optimizations Validated Using HOG., , , , , and . ARC, volume 9625 of Lecture Notes in Computer Science, page 78-90. Springer, (2016)Soft IP core implementation of recursive least squares filter using only multplicative and additive operators., , and . FPL, page 597-600. IEEE, (2007)Session TA5b: Computer arithmetic accelerators for signal processing.. ACSCC, page 980-982. IEEE, (2012)Dataflow toolset for soft-core processors on FPGA for image processing applications., , , and . ACSSC, page 1445-1449. IEEE, (2014)Secure key generation from OFDM subcarriers' channel responses., , , and . GLOBECOM Workshops, page 1302-1307. IEEE, (2014)An effective key generation system using improved channel reciprocity., , , and . ICASSP, page 1727-1731. IEEE, (2015)Power efficient DSP datapath configuration methodology for FPGA., , and . FPL, page 515-518. IEEE, (2008)How Resistant are Sboxes to Power Analysis Attacks?, , and . NTMS, page 1-6. IEEE, (2011)Virtex Implementation of Pipelined Adaptive LMS Predictor in Electronic Support Measures Receiver., , and . FPL, volume 2147 of Lecture Notes in Computer Science, page 367-376. Springer, (2001)Transforming Signal Processing Applications into Parallel Implementations., , , and . EURASIP J. Adv. Signal Process., (2007)