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Disambiguation of "Rutishauser, Georg"

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EBPC: Extended Bit-Plane Compression for Deep Neural Network Inference and Training Accelerators.

, , and . IEEE J. Emerg. Sel. Topics Circuits Syst., 9 (4): 723-734 (2019)

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Georg Rutishauser

Bruno Rutishauser

Verena Rutishauser

Wilhelm Rutishauser

Hans Rutishauser

 

Other publications of authors with the same name

ColibriUAV: An Ultra-Fast, Energy-Efficient Neuromorphic Edge Processing UAV-Platform with Event-Based and Frame-Based Cameras., , , , , and . IWASI, page 287-292. IEEE, (2023)A 12.4TOPS/W @ 136GOPS AI-IoT System-on-Chip with 16 RISC-V, 2-to-8b Precision-Scalable DNN Acceleration and 30%-Boost Adaptive Body Biasing., , , , , , , , , and 7 other author(s). ISSCC, page 326-327. IEEE, (2023)Ternarized TCN for $J/Inference$ Gesture Recognition from DVS Event Frames., , , and . DATE, page 736-741. IEEE, (2022)TCN-CUTIE: A 1, 036-TOp/s/W, 2.72-µJ/Inference, 12.2-mW All-Digital Ternary Accelerator in 22-nm FDX Technology., , , , and . IEEE Micro, 43 (1): 42-48 (2023)A 1036 TOp/s/W, 12.2 mW, 2.72 μJ/Inference All Digital TNN Accelerator in 22 nm FDX Technology for TinyML Applications., , , , and . COOL CHIPS, page 1-3. IEEE, (2022)TCN-CUTIE: A 1036 TOp/s/W, 2.72 uJ/Inference, 12.2 mW All-Digital Ternary Accelerator in 22 nm FDX Technology., , , , and . CoRR, (2022)CUTIE: Beyond PetaOp/s/W Ternary DNN Inference Acceleration with Better-than-Binary Energy Efficiency., , , and . CoRR, (2020)Marsellus: A Heterogeneous RISC-V AI-IoT End-Node SoC With 2-8 b DNN Acceleration and 30%-Boost Adaptive Body Biasing., , , , , , , , , and . IEEE J. Solid State Circuits, 59 (1): 128-142 (January 2024)EBPC: Extended Bit-Plane Compression for Deep Neural Network Inference and Training Accelerators., , and . IEEE J. Emerg. Sel. Topics Circuits Syst., 9 (4): 723-734 (2019)ColibriES: A Milliwatts RISC-V Based Embedded System Leveraging Neuromorphic and Neural Networks Hardware Accelerators for Low-Latency Closed-loop Control Applications., , , , , and . ISCAS, page 1-5. IEEE, (2023)