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Disambiguation of "Biancolin, David"

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FASED: FPGA-Accelerated Simulation and Evaluation of DRAM.

, , , , , , and . FPGA, page 330-339. ACM, (2019)

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Wahyudi David

Florian Bodo David

Joachim David

Jens-Ulrich Davids

Heinz David

 

Other publications of authors with the same name

Fine-Grained Interconnect Synthesis., , and . ACM Trans. Reconfigurable Technol. Syst., 9 (4): 31:1-31:22 (2016)FASED: FPGA-Accelerated Simulation and Evaluation of DRAM., , , , , , and . FPGA, page 330-339. ACM, (2019)FireSim: FPGA-Accelerated Cycle-Exact Scale-Out System Simulation in the Public Cloud., , , , , , , , , and 6 other author(s). ISCA, page 29-42. IEEE Computer Society, (2018)JITPCB., , , , and . IROS, page 2230-2236. IEEE, (2016)Fine-Grained Interconnect Synthesis., , and . FPGA, page 46-55. ACM, (2015)DESSERT: Debugging RTL Effectively with State Snapshotting for Error Replays across Trillions of Cycles., , , , , and . FPL, page 76-80. IEEE Computer Society, (2018)Chipyard: Integrated Design, Simulation, and Implementation Framework for Custom SoCs., , , , , , , , , and 7 other author(s). IEEE Micro, 40 (4): 10-21 (2020)FireSim: FPGA-Accelerated Cycle-Exact Scale-Out System Simulation in the Public Cloud., , , , , , , , , and 6 other author(s). IEEE Micro, 39 (3): 56-65 (2019)Invited: Chipyard - An Integrated SoC Research and Implementation Environment., , , , , , , , , and 8 other author(s). DAC, page 1-6. IEEE, (2020)Accessible, FPGA Resource-Optimized Simulation of Multiclock Systems in FireSim., , , , , , and . IEEE Micro, 41 (4): 58-66 (2021)