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Verified Value Chains, Innovation and Competition., , , , , , , , , and 3 other author(s). CSR, page 470-476. IEEE, (2023)Integer Overflow Detection in Hardware Designs at the Specification Level., , , and . MODELSWARD, page 41-48. SCITEPRESS, (2020)Verification Runtime Analysis: Get the Most Out of Partial Verification., , , , and . DATE, page 873-878. IEEE, (2020)How Deduction Systems Can Help You To Verify Stability Properties., , , and . CoRR, (2024)Code is Ethics - Formal Techniques for a Better World., and . DSD, page 1-3. IEEE, (2019)Towards Automatic Hardware Synthesis from Formal Specification to Implementation., , , and . ASP-DAC, page 375-380. IEEE, (2020)Better Late Than Never : Verification of Embedded Systems After Deployment., , , , and . DATE, page 890-895. IEEE, (2019)Finding the perfect MRI sequence for your patient - Towards an optimisation workflow for MRI-sequences., , , , , , and . CEC, page 1-9. IEEE, (2024)Tool Integration in the UniForM-Workbench., , , , and . Tool Support for System Specification, Development and Verification, page 160-173. Springer, (1998)Using Gated Recurrent Unit Networks for the Prediction of Hemodynamic and Pulmonary Decompensation., , , , , , , and . EMBC, page 4584-4589. IEEE, (2022)