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Verified Compilation and Optimization of Floating-Point Programs in CakeML (Artifact)., , , , , , , and . Dagstuhl Artifacts Ser., 8 (2): 10:1-10:2 (2022)A Trustworthy Monadic Formalization of the ARMv7 Instruction Set Architecture., and . ITP, volume 6172 of Lecture Notes in Computer Science, page 243-258. Springer, (2010)Specification and Verification of ARM Hardware and Software., , and . Design and Verification of Microprocessor Systems for High-Assurance Applications, Springer, (2010)An Algebraic Framework for Verifying the Correctness of Hardware with Input and Output: A Formalization in HOL.. CALCO, volume 3629 of Lecture Notes in Computer Science, page 157-174. Springer, (2005)Formal Specification and Verification of ARM6.. TPHOLs, volume 2758 of Lecture Notes in Computer Science, page 25-40. Springer, (2003)A Verified Certificate Checker for Finite-Precision Error Bounds in Coq and HOL4., , , , , and . FMCAD, page 1-10. IEEE, (2018)Verified compilation of CakeML to multiple machine-code targets., , , and . CPP, page 125-137. ACM, (2017)Hoare Logic for ARM Machine Code., , and . FSEN, volume 4767 of Lecture Notes in Computer Science, page 272-286. Springer, (2007)Improved Tool Support for Machine-Code Decompilation in HOL4.. ITP, volume 9236 of Lecture Notes in Computer Science, page 187-202. Springer, (2015)CHERI Concentrate: Practical Compressed Capabilities., , , , , , , , , and 4 other author(s). IEEE Trans. Computers, 68 (10): 1455-1469 (2019)