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Disambiguation of "Stewart, Andrew"

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Internships, Employability and the Search for Decent Work Experience.

, , , and . Book, (June 2021)

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William Stewart

Richard Stewart

Alan Stewart

Gerdi Stewart

Martin Stewart

 

Other publications of authors with the same name

A 1.02-pJ/b 20.83-Gb/s/Wire USR Transceiver Using CNRZ-5 in 16-nm FinFET., , , , , , , , , and 18 other author(s). IEEE J. Solid State Circuits, 55 (4): 1108-1123 (2020)Information security technologies as a commodity input.. Inf. Manag. Comput. Security, 13 (1): 5-15 (2005)26.3 A pin- and power-efficient low-latency 8-to-12Gb/s/wire 8b8w-coded SerDes link for high-loss channels in 40nm technology., , , , , , , , , and 7 other author(s). ISSCC, page 442-443. IEEE, (2014)Linguistic focus and good-enough representations: An application of the change-detection paradigm, , , and . Psychonomic bulletin & review, 11 (5): 882 (2004)On risk: perception and direction.. Comput. Secur., 23 (5): 362-370 (2004)Probabilistic surrogate networks for simulators with unbounded randomness., , , , , , , and . UAI, volume 180 of Proceedings of Machine Learning Research, page 1423-1433. PMLR, (2022)10.1 A pin-efficient 20.83Gb/s/wire 0.94pJ/bit forwarded clock CNRZ-5-coded SerDes up to 12mm for MCM packages in 28nm CMOS., , , , , , , , , and 12 other author(s). ISSCC, page 182-183. IEEE, (2016)Short-Reach and Pin-Efficient Interfaces Using Correlated NRZ., , , , , , , , , and 11 other author(s). CICC, page 1-8. IEEE, (2020)Modality Differences in Timing: Testing the Pacemaker Speed Explanation., , and . CogSci, cognitivesciencesociety.org, (2017)A 1.02pJ/b 417Gb/s/mm USR Link in 16nm FinFET., , , , , , , , , and 20 other author(s). VLSI Circuits, page 92-. IEEE, (2019)