( en | de | ru )

 

Disambiguation of "Shieh, Ming-Der"

Author of the publication

copydeleteadd this publication to your clipboard
An area-efficient systolic division circuit over GF(2m) for secure communication.

, , , and . ISCAS (5), page 733-736. IEEE, (2002)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Ming-Yan Shieh

Shu-Mei Shieh

Woei-Chyang Shieh

Jin-Wien Shieh

Pi-Er Shieh

 

Other publications of authors with the same name

Design of a High-Speed Square Generator., and . IEEE Trans. Computers, 47 (9): 1021-1026 (1998)A low-latency turbo decoding scheme for diversities-based communication systems., , , and . ICSPCS, page 1-6. IEEE, (2012)Subspace-Based Blind Channel Estimation for MIMO-OFDM Systems with Repetition Index., , , , , and . VTC Fall, page 1-5. IEEE, (2013)Architecture-aware Memory Access Scheduling for High-throughput Cascaded Classifiers., , , , and . DDECS, page 1-4. IEEE, (2019)A New Modular Exponentiation Architecture for Efficient Design of RSA Cryptosystem., , , and . IEEE Trans. Very Large Scale Integr. Syst., 16 (9): 1151-1161 (2008)Efficient Memory-Addressing Algorithms for FFT Processor Design., , and . IEEE Trans. Very Large Scale Integr. Syst., 23 (10): 2162-2172 (2015)Efficient Comparison and Swap on Fully Homomorphic Encrypted Data., and . ISCAS, page 1-4. IEEE, (2019)Reducing Interconnect Complexity for Efficient Path Metric Memory Management in Viterbi Decoders., , and . IEICE Trans. Inf. Syst., 91-D (9): 2300-2311 (2008)High-Speed Design of Montgomery Inverse Algorithm over GF(2m)., , and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 89-A (2): 559-565 (2006)A New Algorithm for High-Speed Modular Multiplication Design., , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 56-I (9): 2009-2019 (2009)