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Implementation and Evaluation of Deep Neural Networks in Commercially Available Processing in Memory Hardware.

, , , , and . SOCC, page 1-6. IEEE, (2022)

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Cyber-physical management for heterogeneously integrated 3D thousand-core on-chip microprocessor., and . ISCAS, page 533-536. IEEE, (2013)Unified Testing and Security Framework for Wireless Network-on-Chip Enabled Multi-Core Chips., , , and . ACM Trans. Embed. Comput. Syst., 18 (5s): 75:1-75:20 (2019)Deep Multi-attributed Graph Translation with Node-Edge Co-Evolution., , , , , and . ICDM, page 250-259. IEEE, (2019)POLAR: Performance-aware On-device Learning Capable Programmable Processing-in-Memory Architecture for Low-Power ML Applications., , , , and . DSD, page 889-898. IEEE, (2022)Defense Against on-Chip Trojans Enabling Traffic Analysis Attacks., , , , , , and . AsianHOST, page 1-6. IEEE, (2020)Evolution of Defenses against Transient-Execution Attacks., , , and . ACM Great Lakes Symposium on VLSI, page 169-174. ACM, (2020)Session details: Session 7A: Special Session - 3: Machine Learning-Aided Computer-Aided Design.. ACM Great Lakes Symposium on VLSI, ACM, (2022)The Fuzz Odyssey: A Survey on Hardware Fuzzing Frameworks for Hardware Design Verification., and . ACM Great Lakes Symposium on VLSI, page 192-197. ACM, (2024)Exploring Coverage Metrics in Hardware Fuzzing: A Comprehensive Analysis., and . ACM Great Lakes Symposium on VLSI, page 240-245. ACM, (2024)ReApprox-PIM: Reconfigurable Approximate Lookup-Table (LUT)-Based Processing-in-Memory (PIM) Machine Learning Accelerator., , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 43 (8): 2288-2300 (August 2024)