( en | de | ru )

 

Disambiguation of "Yuminaka, Yasushi"

Author of the publication

copydeleteadd this publication to your clipboard
Design of Wave-Parallel Computing Circuits for Densely Connected Architectures.

, , and . ISMVL, page 207-214. IEEE Computer Society, (1994)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Yasushi Shono

 

Other publications of authors with the same name

High-Speed Interconnection for VLSI Systems Using Multiple-Valued Signaling with Tomlinson-Harashima Precoding., , and . IEICE Trans. Inf. Syst., 97-D (9): 2296-2303 (2014)Multi-Valued Data Transmission Quality Evaluation Using Two-Dimensional PAM-4 Symbol Mapping., , and . FLAP, 10 (6): 973-991 (2023)Two-Dimensional Symbol Mapping for Evaluating Multi-Valued Data Transmission Quality., , and . ISMVL, page 170-175. IEEE, (2022)Evaluation and Symbol Classification of Multi-Valued Signaling Using Two-Dimensional Symbol Mapping with Linear Mixture Model., , and . ISMVL, page 99-104. IEEE, (2023)A Subthreshold Spiking Neuron Circuit Based on the Izhikevich Model., , , , , , and . ICANN (5), volume 12895 of Lecture Notes in Computer Science, page 177-181. Springer, (2021)Multiple-Valued Data Recovery Techniques for Band-Limited Channels in VLSI., , , and . ISMVL, page 54-60. IEEE Computer Society, (2002)Intra/Inter-Chip CDMA Communications for Efficient Data Transmission Towards New Paradigm of Computing.. J. Multiple Valued Log. Soft Comput., 11 (5-6): 603-618 (2005)PAM-4 Data Transmission Quality Evaluation Using Two- and Three-Dimensional Mapping of Received Symbols., , and . ISMVL, page 94-98. IEEE, (2023)Design of a Set Logic Network Based on Frequency Multiplexing and Its Applications to Image Processing., , and . ISMVL, page 8-15. IEEE Computer Society, (1991)Design of Wave-Parallel Computing Circuits for Densely Connected Architectures., , and . ISMVL, page 207-214. IEEE Computer Society, (1994)